구분 |
분야 |
직무(주요업무) |
요구사항 |
공정
개발 |
Advanced Logic
Process
Development &
Integration |
- SiO2/SiON Gate Dielectrics
- High-K/Metal Gate
- Etch
- Thin Film
- Silicide
- Ultra Shallow Junction
(including RTA & LSA)
- Cu/Ultra Low-K
- Strain Engineering
- Lithography(including OPC/RET)
- FEOL/BEOL Process Integration |
- foundry, logic, image
sensor와 power device
business processes에
대한 이해도, 지식 보유자
- 반도체 분야에 대한
전반적인 배경 지식과 경험 보유자 |
Device & Reliability
Engineering |
- Device & Reliability Engineering
- Device Physics and Optimization
- SRAM Development
- Device Reliability
(including BEOL reliability)
- Strain/SPICE Modeling & Simulation |
Design Infra
Development |
- DFM Engineering
- Design Rule Generation
- Design Infra System |
기타 |
- Defect & Yield Engineering
- CMOS Image Sensor Development,
Integration, Device & Analysis
- Power Device Process Development,
Integration, Device & Analysis |
공정
기술 |
Photo |
- Litho process engineer
- Litho equipment engineer for scanner
- Litho equipment engineer for spinner |
- defect reduction 개선
- foundry customer협업
- photo resist
또는 applicable materials 경험 |
Etch |
- Logic/Foundry Etch Process engineer
- 300mm FAB Dry Etch Process engineer
- Defect/Yield management engineer
- Dry Etch Process department manager |
- 3년 이상의 300m 반도체
Fab process 경험자
- dry etch process 경험자
(STI, Gate, Spacer, MC,
Single/Dual Damascene)
- Fab process 기술 보유자 |
Metal |
- Metal equipment engineer
- Metal process engineer |
- 최소 2년 이상의 FAB
equipment/process
engineer 경험자 |
CVD |
- CVD equipment engineer
- CVDl process engineer
- Defect improvement
- Foundry FAB operation, system expert |
- 최소 2년 이상의 FAB
equipment/process
engineer 경험자 |
Diffusion
Cleaning
Implantation |
- Metal equipment engineer
- Metal process engineer |
- Quality tool에 대한 이해도
- FMEAs
- 6 Sigma
- SPC implementation |
CMP |
- New Device CMP Process Development
engineer
- CMP defects engineering analysis
- New CMP slurries and post CMP
cleaning solutions developer
- New CMP consumables (Pad,conditioning disk 등) developer
- Foundry business customer
correspondence for CMP processes |
- CMP process 전문가
- Pattern Density Effect
on CMP 대한 지식 보유자
- Slurry/Cleaning
Chemical Formulation
대한 이해 必
- 8 Module Process에 대한
이해 必 |
PIE |
- Yield improvement & qualification of
new process technology
- Electrical data distribution
improvement & ensure sufficient
margin to prevent scraps
- Identifying line excursion & root cause
analysis |
- FEOL/BEOL 경험자
- 반도체 processing/
device physic 대한 이해 必 |
Defect analysis |
- Defect Monitoring System & Control
specialist
- Defect Analysis & Reduction specialist |
- 반도체 관련 업계 종사자
- 반도체Chip Maker 경험자
- 검사 설비Tool Maker 출신
- OCD 계측설비 Tool Maker 출신
- Defect data 분석가능자 |
Failure analysis |
- SRAM & Logic Test specialist
- Device level analysis specialist
- Physical Failure Analysis Tool(STEM,
SEM, FIB등)을 활용한 분석 |
- 반도체 관련 업계 종사자
- Logic Chip 분석 경험자
- 분석 Tool(TEM, SEM, FIB)
경험자
- Logic/SRAM Test 경험자
- 소자Level 특성평가 경험자 |
